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Center for Embedded Systems, an National Science Foundation Industry/University Cooperative Research Center.
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Research Projects

CES Research 

 

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  YEAR 8 PROJECTS: 2016-2017
(A=Arizona State, S=Southern Illinois.Year.PI initials)
 
A1.Y8.GF Automated Testing for Functional Coverage for Cyber-Physical Systems Georgios Fainekos
A2.Y8.CJW Dynamic Memory Interference-Aware Technique for Energy-Efficient, QoS-Aware Mobile Web Browsing  Carole-Jean Wu 
A3.Y8.SV Design of Non-Volatile Logic Circuits for Energy Efficient Design Sarma Vrudhula
A4.Y8.FR Building Data-Driven Compressive Sensing Based Wireless Sensor Node for Personalized IoT Fengbo Ren
A5.Y8.KSC Incremental Analysis and Complex Pattern Discovery from Sensor Streams K. Selcuk Candan
A6.Y8.HBA Mutual Learning and Adaptation for Robot to Human Object Handover Heni Ben Amor
A7.Y8.MK Integrated Circuit Authentication and Reliability Tools and Techniques  Michael Kozicki 
A8.Y8.SO Multi-Attribute Circuit Authentication and Reliability Techniques  Sule Ozev, Jennifer Kitchen 
S1.Y8.DK.ST On the Verification of Formal Methods for Digital Embedded Control Systems Dimitri Kagaris, Spyros Tragoudas
S2.Y8.IA Environmental Information and Multi-Sensor Data Fusion Based Performance Estimations for Smart Cars Iraklis Anagnostopoulos
S3.Y8.KC.GAB Supporting Smart Machine Communication with Private LTE Network Kang Chen, Gayan Aruma Badgue
S4.Y8.ST.TH Accurate and Scalable RTL-level Fault Injection Simulation for Industrial and Automotive Standards Spyros Tragoudas, Themistoklis Haniotakis
S5.Y8.CH Power-over-Communication Approach for Integrating Remote Sensors to Motor Drives Constantine Hatziadoniu
S6.Y8.IA.GAB Internet-of-Things Applications Development for Private LTE Small-Cell Networks Iraklis Anagnostopoulos, Gayan Aruma Badgue
     
  YEAR 7 PROJECTS: 2015-2016
(A=Arizona State, S=Southern Illinois.Year.PI initials)
 
A1.Y7.GF Automated Testing for Functional Coverage for Cyber-Physical Systems Georgios Fainekos
A2.Y7.CJW A High-Performance, QoS-aware Memory Scheduling Approach for Highly Parallel, Heterogeneous Smartphone SoCs Carole-Jean Wu
A3.Y7.SV Dynamic Learning of Application Characteristics for Performance and Energy Management of Smartphones Sarma Vrudhula
A4.Y7.FR Building Energy-Efficient, Adaptive, and Secure Wireless Sensor Node By Harnessing Randomness Fengbo Ren
A5.Y7.KSC Large-scale Data-driven Sensing and Analytics for Dynamic Failure Prediction K. Selcuk Candan
A6.Y7.JK Radhard Ka-Band Power Amplifiers for Space Jennifer Kitchen
A7.Y7.HB Development of a novel high-speed CMOS pixel image Hugh Barnaby
S1.Y7.DK Synchronizing Finite State Machine Controllers for Distribution Systems Dimitri Kagaris
S2.Y7.ST.TH Debugging Errors in Failed Functional Test Sequences Spyros Tragoudas, Themistoklis Haniotakis
S3.Y7.IA Distributed Run-time Management for Multi-agent System Iraklis Anagnostopoulos
S4.Y7.DK.ST On the Verification of Formal Methods for Digital Embedded Control Systems Dimitri Kagaris, Spyros Tragoudas
S5.Y7.CH Conducted Emissions from Three-Level Inverters in Embedded Control of PMSM Drives (formerly Embedded Controller for Reduction of Torque Oscillations in a PMSM) Constantine Hatziadoniou
FRP.Y7.SV.ST.JSS.HW Scalable and Power-Efficient Compressive Sensing CMOS Image Sensors and Reconstruction Circuits Sarma Vrudhula, Spyros Tragoudas, Jae-Sun Seo, Haibo Wang
     
  YEAR 6 PROJECTS: 2014-2015
(A=Arizona State, S=Southern Illinois.Year.PI initials)
 
A1.Y6.GF.YHL Parallelization of Embedded Control Applications on Multi-core Architectures: A Case Study Georgios Fainekos, Yann-Hang Lee
A2.Y6.CW Energy-aware Application Scheduling for Heterogeneous and Parallel Smart Phone Architectures  Carole-Jean  Wu
A3.Y6.SV.YC Design of Ultra-low Power Circuits for Compressive Sensing in Mobile Devices Sarma Vrudhula, Yu (Kevin) Cao
A4.Y6.SV Performance Optimal Control of a System of Interconnected Components Under Thermal and Energy Constraints (YEAR II) Sarma Vrudhula
A5.Y6.GF Automated Testing for Functional Coverage for Cyber-Physical Systems Georgios Fainekos
*A6.Y5.SV.SPIN Spintronic Threshold Logic Array Sarma Vrudhula
*A9.Y5.KSC I2AV: Integrate, Index, Analyze, and Visualize Energy Data for Data-driven Simulations and Optimizations K. Selcuk Candan
*A10.Y5.SY Cortical Processor based RRAM Shimeng Yu
S1.Y6.DK Towards Predictable Execution of Safety-Critical Tasks on Mixed-criticality Multi-core Platforms Dimitri Kagaris
S2.Y6.ST.TH A Layout-aware Methodology for Path-delay Fault Grading and Diagnosis Spyros Tragoudas, Themistoklis Haniotakis
S3.Y6.ST Comparison of Image Processing Algorithms on Micro-array Architectures and GPGPU Platforms Spyros Tragoudas
S4.Y6.DK.DIST Synchronizing Finite State Machine Controllers for Distribution Systems Dimitri Kagaris
S5.Y6.CH Optimized Switching Pattern Generator Embedded into an SoC Constantine Hatziadoniu
S6.Y6.LG Background Invariant Laser-spot Detection and Tracking for Embedded Systems Lalit Gupta
     
  YEAR 5 PROJECTS: 2013-2014
(A=Arizona State, S=Southern Illinois.Year.PI initials)
 
A1.Y5.GF.YK Visual Interface for Metric Temporal Logic Specifications Georgios Fainekos, Yoshihiro Kobayashi
A2.Y5.GF.YHL Parallelization of Embedded Control Applications on Multi-core Architectures: A Case Study Georgios Fainekos, Yann-Hang Lee
A3.Y5.YHL Concurrency and Scheduling Analysis of Real-time Embedded Software on Multi-core Processors Yann-Hang Lee
A4.Y5.AS Improving Usability of Multi-core DSPs Aviral Shrivastava
A5.Y5.SV Performance Optimal Control of a System of Interconnected Components Under Thermal and Energy Constraints Sarma Vrudhula
A6.Y5.SV.SPIN Spintronic Threshold Logic Array Sarma Vrudhula
A7.Y5.CW Achieving Energy-fficient Mobile Computing Through Explicit Data Communication and Global Power Management Carole-Jean Wu
A8.Y5.HB Development of Monolithic ROIC for Micro Channel Plate Detectors​ (formerly Readout Integrated Circuit for Fast Imager) Hugh Barnaby
A9.Y5.KSC I2AV: Integrate, Index, Analyze, and Visualize Energy Data for Data-driven Simulations and Optimizations K. Selcuk Candan
S1.Y5.CH Ground Work for Embedding a Field Oriented Motor Controller into a Single System on a Chip Constantine Hatziadoniu
S2.Y5.LG Registration and Fusion of EVS and SVS Runway Images for Embedded Systems Lalit Gupta
S3.Y5.ST An Effective Test Strategy Based on Coverage Driven ATPG Spyros Tragoudas, Themistoklis Haniotakis
S4.Y5.ST Multicore Simulator Critical Path Analysis Spyros Tragoudas
S5.Y5.HR.DK Towards Predictable Execution of Safety-Critical Tasks on Mixed-Criticality Multi-Core Platforms Harini Ramaprasad, Dimitrios Kagaris
S6.Y5.HW.ST Adaptive Compressive Sensing Techniques for Low Power Sensors Haibo Wang, Spyros Tragoudas
S7.Y5.XZ Reliable Wireless Communications in Aircrafts and Other Challenging Environments Xiangwei Zhou
S8.Y5.ST.SV.HW.FRP Fundamental Research Project: Collaborative Research: Synthesis and Design of Robust Threshold Logic Circuits Spyros Tragoudas, Sarma Vrudhula, Haibo Wang
S9.Y5.SV.HW.JL.CORBI CORBI: Collaborative Research: Consortium for Embedded Systems Spyros Tragoudas, Haibo Wang, Jay Lee (Univ. of Cincinnati)
     
  YEAR 4 PROJECTS: 202012-2013
(A=Arizona State, S=Southern Illinois.Year.PI initials)
 
A1.Y4.GF Temporal Logic Testing for Stochastic Cyber-Physical Systems Georgios Fainekos
A2.Y4.KC.GF Parallelization of Embedded Control Applications on Multi-core  Architectures: A Case Study Georgios Fainekos, Karam Chatha
A3.Y4.AS Improving Usability of Mulit-core DSPs with Scratch Pad Memories Aviral Shrivastava
A4.Y4.SV.HB Feasibility of Integrating Memristors and Threshold Logic for compact, Low Power Digital Circuits Sarma Vrudhula, Hugh Barnaby
A5.Y4.KC Development of Electronic System-level Hardware-Software Co-synthesis Approach Karam Chatha
A6.Y4.SV Design of an Optimal Closed Loop Controller and its Implementation in an OS Scheduler for Dynamic Energy Management in Heterogeneous Multi-Core Processors Sarma Vrudhula
 ASU.Y4.ST.SV.HW  Synthesis and Design of Robust Threshold Logic Circuits Spyros Tragoudas, Sarma Vrudhula, Haibo Wang
 JOINT.Y4.ST.SV.HW  Synthesis and Design of Robust Threshold Logic Circuits Spyros Tragoudas, Sarma Vrudhula, Haibo Wang
S1.Y4.HW.NW Curriculum Development: Embedded System Design Using Atom-based Platforms Haibo Wang and Ning Weng 
S2.Y4.LG Object Identification and Tracking Embedded for Embedded Systems Lalit Gupta
S3.Y4.HR.DK Towards Predictable Execution of Safety Critical tasks on Mixed-Criticality Multi-Core Platforms Harini Ramaprasad, Dimitrios Kagaris
S4.Y4.CH.FH.PC Pilot Study of Energy Harvesting Devices towards the Development of a Prototype Constantine Hatziadoniu, Frances Harackiewicz, and Tsuchin (Philip) Chu
S5.Y4.CH.HW Resolver Sensor Conditioning Size Reduction Constantine Hatziadoniu and Haibo Wang 
S6.Y4.MS All-optical Embedded Fiber-optic Up/Down-links For Motor Controller Mohammad Sayeh
S7.Y4.ST Critical Path Analysis of Multicore Systems using BDDs Spyros Tragoudas
S8.Y4.ST High Quality Power-Aware Testing Methodologies for Integrated Circuits Spyros Tragoudas
S9.Y4.HW.ST Adaptive Compressive Sensing Techniques for Low Power Sensors Haibo Wang, Spyros Tragoudas
S10.Y4.NW.ST Trustable Access Mechanisms for Embedded Systems Ning Weng, Spyros Tragoudas
 S11.Y4.ST.SV.HW.FRP  Fundamental Research Project: Collaborative Research: Synthesis and Design of Robust Threshold Logic Circuits Spyros Tragoudas, Sarma Vrudhula, Haibo Wang
     
  YEAR 3 PROJECTS: 2011-2012
(A=Arizona State, S=Southern Illinois.Year.PI initials)
 
A1.Y3.KC A Light-Weight Runtime Multi-Tasking Scheduler for Embedded Multi-Core Architectures Karam Chatha
A2.Y3.GF Statistical Techniques for Property Exploration of Cyber-Physical Systems Georgios Fainekos
A3.Y3.SV.HB Feasibility of Integrating Memristors & Threshold Logic for Compact, Low Power Digital Circuits Sarma Vrudhula, Hugh Barnaby
A4.Y3.AS Programming Non-Coherent Cache Architectures Aviral Shrivastava
A5.Y3.YHL Replay-based Program Profiling & Analysis for Embedded Systems Yann-Hang Lee
A6.Y3.YHL.CORBI Replay Debugging for Multi-threaded and Multi-core Embedded Systems (CORBI) Yann-Hang Lee
S1.Y3.ST Visualization of Executed Software Paths Spyros Tragoudas
 S2.Y3.ST  Statistical fault Grading and Diagnosis Spyros Tragoudas
S3.Y3.YC.JQ Development of a Fast Grain Quality Measurement System Ying (Ada) Chen, Jun Qin
S4.Y3.JQ Survey and Assessment of Advanced Haptics Technology Jun Qin
S5.Y3.ST.NW JTAG-based Device Security for Embedded Systems  Spyros Tragoudas, Ning Weng
S6.Y3.ST.HW Platform for Automated Test and Programming of Embedded System on Module Spyros Tragoudas, Haibo Wang
S7.Y3.NW.HW Enhancing Embedded Systems Curriculum using Atom-based Platform Ning Weng
S8.Y3.ST Feasibility Study in improving the Reliability of an MSP430 Embedded System Spyros Tragoudas
S9.Y3.DK.HR Towards Optimal Design of Networking Infrastructure in Bus-based Systems Dimitrios Kagaris, Harini Ramaprasad
S10.Y3.SA.JQ.PC Numerical Modeling of Coupled-Thermomechanical processes Shaikh Ahmed, Jun Qin, Tsuchin Chu
     
  YEAR 2 PROJECTS: 2010-2011
(A=Arizona State, S=Southern Illinois.Year.PI initials)
 
A1.Y2.KC Automated Design and Evaluation of Network-on-Chip Architectures for Communication Centric System-on-Chip Devices Karam Chatha
A2.Y2.GF.C Robust Testing for Networked Control Systems and Mixed-Signal Systems Georgios Fainekos
A3.Y2.YHL.C Replay Debugging for Multi-threaded and Multi-core Embedded Systems Yann-Hang Lee
A4.Y2.AS.C Memory-Aware Compilation for Modern Multi-core Processors Aviral Shrivastava
A5.Y2.KC Platform Level Dynamic Switching Between Loosely Timed / Approximate Timed SystemC Models Karam Chatha
A6.Y2.SV Modeling and Optimization for Energy Efficient Data Centers Sarma Vrudhula
S1.Y2.ST.C Alien Hardware Detection in Integrated Circuits through Delay Measurements and Computations Spyros Tragoudas
S3.Y2.ST.KS Distance Calculation to a Radio Transmitter With a Secure Network of Mobile Receivers Spyros Tragoudas, Khadija Stewart
S2.Y2.FH.C Dielectric Resonator Antennas (DRAs) Frances Harackiewicz
S4.Y2.HW.C Development of Telemetry Circuit for Sol-gel Sensors Haibo Wang
S5.Y2.ST Error Detection and Correction for Early Latching Technique Spyros Tragoudas
S6.Y2.ST Statistical Fault Grading and Diagnosis Spyros Tragoudas
S7.Y2.AC Development of Fast Grain Quality Measurement System Ying (Ada) Chen
S8.Y2.NW JTAG-based Device Security for Embedded Systems Ning Weng, Spyros Tragoudas
S9.Y2.JQ Survey and Assessment of Advanced Haptics Technology Jun Qin
S10.Y2.ST Platform for Automated Test and Programming on Embedded System on Module Spyros Tragoudas, Haibo Wang
     
  YEAR 1 PROJECTS: 2009-2010
(A=Arizona State, S=Southern Illinois.Year.PI initials)
 
A1.Y1.KC Design of Image and Signal Processing Algorithms on the Intel Larrabee Platform Karam Chatha
A2.Y1.GF Robust Testing for Networked Control Systems and Mixed-Signal Systems Georgios Fainekos
A3.Y1.YHL Replay Debugging for Multi-threaded and Multi-core Embedded Systems Yann-Hang Lee
A4.Y1.AS Memory-Aware Compilation for Modern Multi-core Processors Aviral Shrivastava
A5.Y1.SV Modeling and Optimization for Energy Efficient Data Centers Sarma Vrudhula
S1.Y1.ST Alien Hardware Detection Spyros Tragoudas
S2.Y1.FH Study of Improving the Bandwidth Performance of Hybrid DRAs Frances Harackiewicz
S3.Y1.ST GPS-free Distance Estimation to an RF Signal Source Spyros Tragoudas
S4.Y1.HW Development of Telemetry Circuit for Sol-gel Sensors Haibo Wang
S5.Y1.ST Early Clock On-chip Mechanisms and Architectures for Buses Spyros Tragoudas
   
 



Cooperative Research

National Science Foundation

The Center for Embedded Systems is a National Science Foundation Industry/University Cooperative Research Center.

 

Industry Members

Inception to Present

Bosch
Ford Motor Company
Intel
Johnson Controls
LEMKO
Marvel Technology Group, Inc.
Qualcomm
Raytheon
Rockwell Collins
Toyota
UTC Aerospace Systems
General Dynamics
Alpha Core
Caterpillar
Dickey-john
EMAC Inc.
Naval Sea Systems Command